+ +
- -
Systèmes d'Exploitation
Calendrier  Détails
Calendrier  Détails
Processeurs ARM
Calendrier  Détails
Processeurs PowerPC
Calendrier  Détails
Calendrier  Détails
+ +
> >
- -

Dernières Nouvelles

Contrôle moteur par des gestes avec System Workbench for Linux sur un MCU STM32MP1 (présentation vidéo)

Workshop gratuit Linux Embarqué avec System Workbench for Linux le 24 Septembre 2019 à Lyon Saint-Priest, avec ARROW

ac6 >> ac6-training >> Communications >> Connectivity >> Display Port 1.1a Télécharger le catalogue Télécharger la page Ecrivez nous Version imprimable

IM2 Display Port 1.1a

This course covers the Display Port multimedia interface

  • The course describes the architecture of a DisplayPort source-cable-sink system.
  • An introduction to Video and Audio standards is done prior to clarifying how this standards are transported through DisplayPort.
  • The analog interface is studied in detail.
  • The course clarifies information 8b10b coding / decoding schemes.
  • Content protection mechanisms are also studied.
A more detailed course description is available on request at training@ac6-training.com
  • A basic knowledge of multimedia standards (audio & video).

First day
  • Chip-to-Chip or box-to-box utilization
  • Layered architecture
  • Pinout
  • Forward drive channel and bi-directional auxiliary channel
  • Mechanical specification
  • Dual mode devices
  • Hot plug / Unplug detect circuitry
  • Main channel
    • 8b10b coding scheme, running disparity
    • Clock recovery logic
    • Channel equalization sequence
    • Scrambling, whitening the spectrum, Scrambler reset
    • Link quality measurement
    • Transmitter and receiver electrical specifications
    • Drive current and pre-emphasis level control
    • Jitter requirements
  • Auxiliary channel
    • Manchester II coding, self-clocking
    • Sync pattern, Stop condition
    • AC coupling
  • Compliance test specification
  • Isochronous transport services over the main link
    • Enhanced framing mode
    • Link symbols over the main Link without video stream
    • Adapting the stream rate to the link rate
    • Stream reconstruction in the Sink
    • Extracting the secondary data packet
    • Stream clock recovery, synchronous vs asynchronous clock modes
    • Secondary–data packet types, purpose of InfoFrames packets
  • Auxiliary channel
    • Link and device management over the auxiliary channel
    • Source state machine
    • Arbitration control
    • Policy maker
    • Mapping of I2C onto AUX CH syntax
    • Address mapping for DPCD
  • Compliance test specification
    • Device services test procedures
    • Device Link services test procedures
Second day
  • Video standard basics, SDTV, EDTV, HDTV
  • Pixel mapping onto link lanes according to pixel coding
  • Video timing format
  • Direct drive display specification
  • Embedded Display Port
  • Audio basics, L-PCM coding, IEC standards
  • Speakers mapping
  • Scheduling of audio stream packet transmission
  • Source / Sink device interoperability, audio format
  • Structure of audio stream packets
  • The Display Data Channel [DDC] usage during configuration
  • AVI info frame
  • Audio info frame
  • E-EDID data structure
  • Source device behavior upon HPD pulse detection
  • HDCP specification (DRM)
    • Authentication of devices allowed to play HD content
    • Computation of shared key
    • HDCP over Display Port
    • Application to DVD-audio and super-audio CD
  • DPCP specification
    • DPCP bulk encryption / decryption blocks
    • AUX CH transactions for DPCP